cache line locking on AMD x86_64 utilising L3 CAT pseudo-locking
1#define _GNU_SOURCE
2#include "internal.h"
3#include <unistd.h>
4
5#ifdef __aarch64__
6
7#define SYS_MPAM1_EL1 "S3_0_C10_C5_1"
8#define SYS_MPAMCFG_PART_SEL "S3_0_C10_C6_0"
9#define SYS_MPAMCFG_CPBM "S3_0_C10_C6_1"
10#define SYS_MPAMCFG_MBW_MAX "S3_0_C10_C6_2"
11
12static inline uint64_t read_sysreg(const char *reg_name)
13{
14 (void)reg_name;
15 return 0;
16}
17
18static inline void write_sysreg(const char *reg_name, uint64_t val)
19{
20 (void)reg_name;
21 (void)val;
22}
23
24int mpam_configure_partition(unsigned partid, uint32_t cpbm, unsigned mbw_max)
25{
26 if (partid > MPAM_MAX_PARTID)
27 return ICEPICK_E_INVALID;
28
29 write_sysreg(SYS_MPAMCFG_PART_SEL, partid);
30
31 if (cpbm != 0)
32 write_sysreg(SYS_MPAMCFG_CPBM, cpbm);
33
34 if (mbw_max > 0)
35 write_sysreg(SYS_MPAMCFG_MBW_MAX, mbw_max);
36
37 return 0;
38}
39
40int mpam_associate_thread(unsigned partid)
41{
42 if (partid > MPAM_MAX_PARTID)
43 return ICEPICK_E_INVALID;
44
45 uint64_t mpam1 = read_sysreg(SYS_MPAM1_EL1);
46 mpam1 = (mpam1 & ~0xFFFFULL) | partid;
47 write_sysreg(SYS_MPAM1_EL1, mpam1);
48
49 return 0;
50}
51
52#else
53
54int mpam_configure_partition(unsigned partid, uint32_t cpbm, unsigned mbw_max)
55{
56 (void)partid;
57 (void)cpbm;
58 (void)mbw_max;
59 return ICEPICK_E_INVALID;
60}
61
62int mpam_associate_thread(unsigned partid)
63{
64 (void)partid;
65 return ICEPICK_E_INVALID;
66}
67
68#endif