vm.fail
cache line locking on AMD x86_64 utilising L3 CAT pseudo-locking
1#define _GNU_SOURCE
2#include "internal.h"
3#include <fcntl.h>
4#include <unistd.h>
5#include <stdio.h>
6#include <errno.h>
7
8int msr_open(int cpu)
9{
10 char path[64];
11 snprintf(path, sizeof(path), "/dev/cpu/%d/msr", cpu);
12 int fd = open(path, O_RDWR);
13 if (fd < 0) {
14 if (errno == ENOENT)
15 return ICEPICK_E_NO_CAT;
16 if (errno == EACCES || errno == EPERM)
17 return ICEPICK_E_PERMISSION;
18 return ICEPICK_E_MSR;
19 }
20 return fd;
21}
22
23void msr_close(int fd)
24{
25 if (fd >= 0)
26 close(fd);
27}
28
29int msr_read(int fd, uint32_t msr, uint64_t *value)
30{
31 if (pread(fd, value, sizeof(*value), msr) != sizeof(*value))
32 return ICEPICK_E_MSR;
33 return 0;
34}
35
36int msr_write(int fd, uint32_t msr, uint64_t value)
37{
38 if (pwrite(fd, &value, sizeof(value), msr) != sizeof(value))
39 return ICEPICK_E_MSR;
40 return 0;
41}