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libsetjmp: fix unpredictable behavior warning on ARM Cortex-M
GAS warns about unpredictable behavior of "ldr sp, [a1], #4"
that exists on Cortex-M3 (errata 752419) but this warning is
incorrectly issued on other cores too (eg, Cortex-M7).
Since the fix is just one extra instruction we may as well
apply the workaround for all Cortex-M targets.
Change-Id: I0c2aa46837f776d67d0236b627af1572aa5ab307
author
Aidan MacDonald
date
(Apr 19, 2025, 11:24 AM -0400)
commit
c249dea2
c249dea2b72e2e510cd6599054fa6d22fa868645
parent
6ea328f0
6ea328f0f1865a75fdfd16cd8cca04818facdd26
+12
-1
+12
-1
lib/libsetjmp/arm/setjmp.S
+12
-1
lib/libsetjmp/arm/setjmp.S
···
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/* Restore the registers, retrieving the state when setjmp() was called. */
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#ifdef __thumb2__
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ldmfd a1!, { v1-v7, fp, ip, lr }
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-
ldr sp, [a1],#+4
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#if __ARM_ARCH_PROFILE == 'M'
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/*
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* Errata 752419: Interrupted loads to SP can cause erroneous behaviour
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* Apply the suggested workaround of loading to an intermediate register
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* and then moving into sp. This only affects Cortex-M3 but a warning is
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* issued by the assembler for all armv7-m targets with binutils 2.38.
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*/
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ldr a3, [a1], #4
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mov sp, a3
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#else
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ldr sp, [a1], #4
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#endif
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#else
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ldmfd a1!, { v1-v7, fp, ip, sp, lr }
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#endif