Fork 0

Pipelined VGA text/character generator controller in Verilog

Verilog 100%

Find a file

Christopher Parish b5df1cb335 Added parameter selecting registered output RAM		2018-12-08 08:45:02 -05:00
doc	Added block diagram	2017-12-01 21:26:21 -05:00
vgacg	Added parameter selecting registered output RAM	2018-12-08 08:45:02 -05:00
.gitattributes	Updated GitHub language detection	2017-11-25 23:03:24 -05:00
exampleFontROM.bin	Added sources	2017-11-25 22:57:42 -05:00
LICENSE	Initial commit	2017-11-24 22:38:19 -05:00
README.md	Update README.md	2017-12-01 21:26:36 -05:00
vgaCharGen.v	Added parameter selecting registered output RAM	2018-12-08 08:45:02 -05:00

README.md

VGA-CharGen

The VGA-CharGen is a memory-mapped, pipelined VGA text/character generator written in Verilog. Intended to be used with soft processors, old-school computers, or other SoC-like environments, an attribute/character RAM is provided, operating in the host system's clock domain independent from the video logic. This control interface is modeled after the old VGA (as in IBM's VGA) Mode 3.

Overview

In order to achieve pixel clock speeds sufficient for 1920x1080@60Hz and beyond, the VGA-CharGen breaks up the memory access and video generation into many small operations, occurring concurrently. At present, this pipeline of activities is 7-stages deep from the perspective of the video clock. (The external host clock for writing into the dual-ported attribute/character RAM is independent).

Screenshots

VGA-CharGen providing a memory-mapped text interface at 640x480@60Hz for an educational MIPS soft-processor

Resolutions exceeding 1920x1080@60Hz (shown here) are possible