Chris ChrisPVille
5 followers · 7 following
  • Maryland, USA

  • Embedded, FPGA/HDL, space systems, RF design, retro thingies, and more

  • Joined on 2016-06-23
Repositories
22
 Projects Packages Starred repositories
6
Filter
Sort
quokka
Verilog 0 0
Quokka 6502 Microprocessor Trainer
Updated 2023-07-03 23:38:58 +00:00
plytogx
Python 0 0
PLY to GX call converter for libogc based GCN/Wii applications
Updated 2022-07-25 23:24:32 +00:00
iconic
0 0
Some brief notes about the Gamebube IPL bug
Updated 2022-07-13 21:08:44 +00:00
mig_example
Verilog 0 0
Example using DDR2 memory and MIG IP on the Nexys 4 DDR / Nexys A7 FPGA Trainer
Updated 2022-06-07 15:14:03 +00:00
aux-display
Shell 1 0
CAD and Conky configs for a 1920x480 HSD088IPW1 Display
Updated 2021-03-02 00:51:13 +00:00
raisin64-docs
HTML 0 0
Source and build tree for the Raisin64 project documentation
Updated 2021-02-11 02:09:38 +00:00
fsys.io
Ruby 0 0
The fsys.io site, where I can organize my thoughts and share them
Updated 2020-09-23 23:25:07 +00:00
h8-dumper
Tcl 0 0
Clock glitching FPGA-based ROM dumper for the H8/3292 and related mask ROM parts
Updated 2020-08-29 15:39:24 +00:00
64dd-dumps
Python 1 0
Various data dumps from the 64DD
Updated 2020-08-25 08:24:12 +00:00
64dd-schematics
0 0
Schematics for the Nintendo 64 Disk Drive (N64DD)
Updated 2020-08-20 21:56:08 +00:00
openpnp-config
JavaScript 0 0
Machine configuration files for my OpenPnP based Pick and Place machine
Updated 2019-12-08 07:07:19 +00:00
raisin64-cpu
Verilog 0 0
Updated 2019-03-28 00:26:12 +00:00
raisin64-nexys4ddr
VHDL 0 0
Reference implementation of the Raisin64 on a Nexys 4 DDR board
Updated 2019-03-28 00:24:50 +00:00
raisin64-binutils
C 0 0
Fork of binutils-gdb for the Raisin64
Updated 2019-03-14 20:29:24 +00:00
raisin64
0 0
RISC Architecture with In-order Superscalar INterlocked-pipeline - 64 Bits
Updated 2018-12-09 08:00:34 +00:00